Magnetoelectronic devices, spin electronic devices, and spintronic devices are synonymous terms for devices that make use of effects predominantly caused by electron spin. Magnetoelectronics are used in numerous information devices to provide non-volatile, reliable, radiation resistant, and high-density data storage and retrieval. The numerous magnetoelectronics information devices include, but are not limited to, Magnetoresistive Random Access Memory (MRAM), magnetic sensors, and read/write heads for disk drives.
Typically an MRAM includes an array of magnetoresistive memory elements. Each magnetoresistive memory element typically has a structure that includes multiple magnetic layers separated by various non-magnetic layers, such as a magnetic tunnel junction (MTJ), and exhibits an electrical resistance that depends on the magnetic state of the device. Information is stored as directions of magnetization vectors in the magnetic layers. Magnetization vectors in one magnetic layer are magnetically fixed or pinned, while the magnetization direction of another magnetic layer may be free to switch between the same and opposite directions that are called “parallel” and “antiparallel” states, respectively. Corresponding to the parallel and antiparallel magnetic states, the magnetic memory element has low and high electrical resistance states, respectively. Accordingly, a detection of the resistance allows a magnetoresistive memory element, such as an MTJ device, to provide information stored in the magnetic memory element. There are two completely different methods used to program the free layer: field switching and spin-torque switching. In field-switched MRAM, current carrying lines adjacent to the MTJ bit are used to generate magnetic fields that act on the free layer. In spin-torque MRAM, switching is accomplished with a current pulse through the MTJ itself. The angular momentum carried by the spin-polarized tunneling current causes reversal of the free layer, with the final state (parallel or antiparallel) determined by the polarity of the current pulse. Spin-torque transfer is known to occur in MTJ devices and giant magnetoresistance devices that are patterned or otherwise arranged so that the current flows substantially perpendicular to the interfaces, and in simple wire-like structures when the current flows substantially perpendicular to a domain wall. Any such structure that exhibits magnetoresistance has the potential to be a spin-torque magnetoresistive memory element. In some device designs the free magnetic layer of the MTJ may have stable magnetic states with magnetization in the film plane, and in other cases the stable states have magnetization perpendicular to the plane. In-plane devices typically have their magnetic easy axis defined by the in-plane shape of the free layer and perpendicular devices typically employ materials with a perpendicular magnetic anisotropy (PMA) that create a perpendicular easy axis.
Spin-torque MRAM (ST-MRAM), also known as spin-torque-transfer RAM (STT-RAM), is an emerging memory technology with the potential for non-volatility with unlimited endurance and fast write speeds at much higher density than field-switched MRAM. Since ST-MRAM switching current requirements reduce with decreasing MTJ dimensions, ST-MRAM has the potential to scale nicely at even the most advanced technology nodes. However, increasing variability in MTJ resistance and sustaining relatively high switching currents through bitcell select devices in both current directions can limit the scalability of ST-MRAM. The write current is typically higher in one direction compared to the other, so the select device must be capable of passing the larger of the two currents. In addition, ST-MRAM switching current requirements increase as the write current pulse duration is reduced. Because of this, the smallest ST-MRAM bitcell approach may require relatively long switching times.
One approach to manage the increasing MTJ resistance variability as ST-MRAM is scaled is to use a self-referenced read operation to determine the state of the bits. One such self-referenced read operation would bias a bit to a desired voltage and maintain a reference reflecting the required current, then switch the bit to a known state. The original state of the bit can be determined by comparing the current required to bias the bit in the new state to the current that was required in the original state. No change in current would indicate that the original state matched the switched state, while a change in current in the expected direction would indicate that the original state was opposite of the switched state.
Where a self-referenced read operation can overcome the impact of MTJ resistance variation, it may also increase the read time requirement. The relatively long time required for a self-referenced read operation in conjunction with the relatively long ST-MRAM write times (compared to static random access memory (SRAM), for example) make high sequential bandwidth read and write approaches, like those used by dynamic random access memories (DRAMs), more desirable. In the approach used by DRAMs, a large page of bits (several thousand) are read simultaneously and the values are each stored in a latch, then at much higher speed, subsets of the page of bits are read out of the part. For writes in DRAMs, data is similarly written to subsets of the page, after which there is a time required to complete the write process. DRAM interfaces, such as synchronous dynamic random access memory (SDRAM) and double data rate (DDR) DRAM, are designed to maximize sequential bandwidth while allowing for the naturally slow random cycle time of DRAM technology. ST-MRAM may benefit from a similar approach; however, one key challenge would be managing the power required to read and write a large page of bits at high bandwidth.
Accordingly, it is desirable to provide ST-MRAM structures and methods that shorten a self-referenced read operation, reduce the power requirement when performing a self-referenced read operation to a plurality of bits, or enable a memory to function with ST-MRAM switching that only requires current be applied through the MTJ in the one direction having the lower critical current requirement. Furthermore, other desirable features and characteristics of the exemplary embodiments will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.